Arm architecture
Arm registers
| Name | Alias | Purpose |
|---|---|---|
| R0 | – | General purpose |
| R1 | – | General purpose |
| R2 | – | General purpose |
| R3 | – | General purpose |
| R4 | – | General purpose |
| R5 | – | General purpose |
| R6 | – | General purpose |
| R7 | – | Holds Syscall Number |
| R8 | – | General purpose |
| R9 | – | General purpose |
| R10 | – | General purpose |
| R11 | FP | Frame Pointer |
Special Purpose Registers
| Name | Alias | Purpose |
|---|---|---|
| R12 | IP | Intra Procedural Call |
| R13 | SP | Stack Pointer |
| R14 | LR | Link Register |
| R15 | PC | Program Counter |
| CPSR | – | Current Program Status Register |
The CPSR contains the following ALU status flags:
N: Set when the result of the operation was Negative.Z: Set when the result of the operation was Zero.C: Set when the operation resulted in a Carry.V: Set when the operation caused overflow.
Note
PC points two instructions ahead of the current PC value, because older ARM processors always fetched two instructions ahead of the currently executed instructions
Most common instructions
MOV- Move dataEOR- Bitwise XORMVN- Move and negateLDR- LoadADD- AdditionSTR- StoreSUB- SubtractionLDM- Load MultipleMUL- MultiplicationSTM- Store MultipleLSL- Logical Shift LeftPUSH- Push on StackLSR- Logical Shift RightPOP- Pop off StackASR- Arithmetic Shift RightB- BranchROR- Rotate RightBL- Branch with LinkCMP- Compare BXBranch- and eXchangeAND- Bitwise ANDBLX- Branch with Link and eXchangeORR- Bitwise ORSWI/SVC- System Call